http://vmcc.vicp.net:9090/wiki/ 2026-04-21T17:17:18+00:00 http://vmcc.vicp.net:9090/wiki/ http://vmcc.vicp.net:9090/wiki/lib/tpl/dokuwiki/images/favicon.ico text/html 2023-03-17T10:12:24+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:anyconnect&rev=1679019144&do=diff anyconnect <https://www.vps000.org/> 备用名： <https://www.vps001.org/> text/html 2023-11-06T15:36:04+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:arm_tools&rev=1699256164&do=diff arm_tools 1. arm corelink family arm Socrates 是目前最新的配置AMBA related IP, 如 nic-450等的工具， AMBA designer 可以认为是arm Socrates的老版子集工具，比如可用于配置nic-400 Carbon SoCDesigner 是behavior model用的工具。RealView SoCDesigner没用过，印象中是软件用的 text/html 2023-03-17T10:12:24+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:eda%E5%B7%A5%E5%85%B7&rev=1679019144&do=diff 查看rtl * verdi rtl仿真 * vcs (synopsys) * irun & xrun (cadence) cdc工具 * cdc - questa cdc，用来查看cdc, mentor公司的。 * spygalss 综合工具 * dc 工具名词解释 VCS_MX為mixed hdl仿真器，支持vhdl+verilog+sv的混合仿真。 VCS則是verilog+sv的 VC LP // Low Power Signoff and Static Verification (rtl & post) VC Forma l // Next-Generation Formal Verification VC Formal DPV (Datapath Validation) // VC Formal Datapath Validation (DPV) App with integrated HECTOR™… text/html 2023-03-17T10:12:24+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:icc&rev=1679019144&do=diff icc 1. icc2 get floorplan txt set cells [get_cells *]; # tiles # set cells [add_to_collection $cells [get_cells */*]]; echo "" > tile_location.rpt; foreach_in_collection cell $cells { if { [get_attr -quiet $cell boundary] != [list] } { echo "design [get_object_name $cell]" >> tile_location.rpt; echo "area [get_attr -quiet $cell boundary]" >> tile_location.rpt; } } text/html 2025-06-23T20:21:42+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:jtag%E8%B0%83%E8%AF%95%E5%99%A8&rev=1750681302&do=diff jtag调试器 主要是关注如何支持多个JTAG DEVICE(chaining multiple targets) 1. 公共需求 In order to chain targets, the devices must support the following: * BYPASS register. * The IDCODE instruction must immediately follow a reset of the Test Access Port (TAP). text/html 2025-05-07T15:50:34+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:package%E5%B0%81%E8%A3%85&rev=1746604234&do=diff package封装 <https://zhuanlan.zhihu.com/p/1896206164573782105> <https://www.ab-sm.com/a/23456> 1. 传统2D封装 物理结构：所有芯片和无源器件均安装在基板平面上，芯片和无源器件与XY平面直接接触。 电气连接：通过基板上的布线和过孔实现电气互连，通常使用键合线将芯片与基板连接。 text/html 2023-03-17T10:12:24+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:scan%E5%AD%A6%E4%B9%A0&rev=1679019144&do=diff scan学习 <https://blog.csdn.net/sinat_27691203/article/details/126569525?spm=1001.2014.3001.5502> text/html 2023-03-17T10:12:24+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:test%E5%90%8D%E8%AF%8D%E8%A7%A3%E9%87%8A&rev=1679019144&do=diff ATE(Auto Test Equipment) 在测试工厂完成. 大致是给芯片的输入管道施加所需的激励信号，同时监测芯片的输出管脚，看其输出信号是否是预期的值。有特定的测试平台。 SLT(System Level Test) 也是在测试工厂完成，与ATE一起称之为Final Test. SLT位于ATE后面，执行系统软件程序，测试芯片各个模块的功能是否正常。 text/html 2025-06-03T16:27:04+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:verilog&rev=1748939224&do=diff verilog vcs仿真参考 vcs使用 1. 异步复位 异步复位，同步释放，复位释放时需和clk满足时序关系。 always@(posedge clk or negedge rst_n) begin if (!rst_n) begin end else begin end end 2. 同步复位 同步复位时，rst_n拉低， 时钟需要一直有。 text/html 2025-04-07T09:01:49+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:xrun&rev=1743987709&do=diff cadence xrun rtl仿真工具 cadence继irun之后的仿真工具 1. 执行 方式一： 单命令执行， compile, elaborate, run xrun +access+rwc top.v -input wave.tcl 方式二： 分三步执行， compile, elaborate, run xrun -compile top.v xrun -elaborate +access+rwc top.v; # +access+rwc加了这个，才能dump出波形信号，不然是空的。 xrun -R -input wave.tcl ; ## 这里的wave.tcl是控制仿真过程，以及添加shm (for simvision)格式和ida 格式的波形，如果不需要的话，可以不加。… text/html 2023-08-23T21:23:39+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:%E5%AE%89%E8%A3%85questasim&rev=1692797019&do=diff 安装questasim 转自<https://bbs.eetop.cn/forum.php?mod=viewthread&tid=913460&highlight=questasim> 0. install dependencies in ubuntu 20 sudo apt install libxft2 libxft2:i386 lib32ncurses6 sudo apt install libxext6 sudo apt install libxext6:i386 1. lic gen python2 mgclicgen.py <hostid> license.dat is generated 2. install questa sim text/html 2024-01-12T09:14:12+00:00 Anonymous (anonymous@undisclosed.example.com) http://vmcc.vicp.net:9090/wiki/doku.php?id=edastudy:%E7%BB%98%E5%9B%BE%E8%BD%AF%E4%BB%B6&rev=1705022052&do=diff 绘图软件 <https://graphviz.org/> <https://plantuml.com/> <https://mermaid.js.org/> <https://cdn.jsdelivr.net/npm/mermaid@9.2.2/dist/> <https://schemdraw.readthedocs.io/en/latest/gallery/ic.html> -- 不好用，元件东倒西歪的，也不能进行自动布局 <https://wavedrom.com/tutorial.html> <https://www.syncfusion.com/blogs/post/digital-logic-circuit-javascript.aspx> <https://gojs.net/latest/download.html> -- 无法自动布局，需要自己给出元件坐标，可远性应该是很高的。 <https://www.drawio.com/> -- 在线画图，支持自动布局 yEd <https://www.yworks.com/products/yed>…