====== xilinx仿真dump波形 ====== 点开仿真后,在命令行source dump_vcd.tcl, 即可dump出来预期的波形 open_vcd xsim_dump_vlen0_ch0_tx.vcd log_vcd -level 2 /board/EP/ log_vcd /board/EP/uart_sniffer* log_vcd /board/EP/rx_stream_arbiter/* log_vcd /board/EP/pcie_misc_ctl/* log_vcd /board/EP/tx_stream_demux/* log_vcd /board/EP/PXIE_F4G_100M_top_ch* run 800us #close_vcd