====== - datapath ======

===== - pipeline =====

有三种pipeline, 这三种pipe从端口上来看时序是一样的，<color #ed1c24>最终效果都是用正沿打一拍</color>。

**Receiver1xPipeline**

前一级是用正沿打出来的，这里先用负沿打一下是为了修hold。
比如前级reg的clk tree比较短，后级的clk tree比较长，这样后级采样的时候hold容易出问题。

{{:edastudy:tessent:pasted:20240528-202232.png?nolink}}

**Pipeline**

{{:edastudy:tessent:pasted:20240528-202246.png?nolink}}

**OutputPipeline**

{{:edastudy:tessent:pasted:20240528-202258.png?nolink}}



**RxPipeline**

{{:edastudy:tessent:pasted:20240528-204754.png?nolink}}


===== - example 1 =====

<code tcl>
    DataPath(1) {
      output_bus_width       : 2;
      Pipeline(2) {
      }
      ScanHost(1) {
      }
      Pipeline(1) {
      }
    }
</code>

<flow>
graph LR
ssn_busin-->pipe1
pipe1-->ssh
ssh-->pipe2
pipe2-->ssn_busout
</flow>





===== - example 2 =====

<code>
    DataPath(1) {
      output_bus_width       : 2;
      ScanHost(1) {
      }
      Multiplexer(1) {
          Connections {
              secondary_bus_data_in  : ssn_s0_bus_data_in[1:0];
          }
          Pipeline(22) {
          }
      }
      Pipeline(1) {
        ExtraOutputPath {
            Connections {
              bus_clock_out      : ssn_s0_bus_clock_out;
              bus_data_out       : ssn_s0_bus_data_out[1:0];
            }
            Pipeline(11) {
            }
        }
      }
    }
</code>


<flow>
graph LR
ssn_busin-->pipe1
pipe1-->mux1
pipe1-->pipe11;
pipe11-->ssn_s0_bus_o;
ssn_s0_bus_o -.->ssn_s0
ssn_s0-->pipe22
pipe22-->mux1



mux1-->ssh
ssh-->ssn_busout
</flow>


===== - example 3 =====

<code>
    DataPath(1) {
      output_bus_width       : 2;
      ScanHost(1) {
      }
      Multiplexer(2) {
          Connections {
              secondary_bus_data_in  : ssn_s1_bus_data_in[1:0];
          }
      }
      Pipeline(2) {
        ExtraOutputPath {
            Connections {
              bus_clock_out      : ssn_s1_bus_clock_out;
              bus_data_out       : ssn_s1_bus_data_out[1:0];
            }
        }
      }
      Multiplexer(1) {
          Connections {
              secondary_bus_data_in  : ssn_s0_bus_data_in[1:0];
          }
      }
      Pipeline(1) {
        ExtraOutputPath {
            Connections {
              bus_clock_out      : ssn_s0_bus_clock_out;
              bus_data_out       : ssn_s0_bus_data_out[1:0];
            }
        }
      }
    }

</code>

<flow>
graph LR
ssn_busin-->pipe1
pipe1-->mux1
pipe1-->ssn_s0_bus_o;
ssn_s0_bus_o -.->ssn_s0
ssn_s0-->mux1
mux1-->pipe2

pipe2-->mux2
pipe2-->ssn_s1_bus_o;
ssn_s1_bus_o -.->ssn_s1
ssn_s1-->mux2


mux2-->ssh
ssh-->ssn_busout
</flow>